The submicron technology used for semiconductor device fabrication often results in the speed of a very large scale integrated (VLSI) chip being more likely to be limited by delays due to interconnects rather than the transistor action of the devices. Multilevel metallization is one of the available technologies used to reduce the total length of interconnects. In multilevel metallization, different layers of patterned conductors are isolated from each other by insulators, and contacts are made between conductors on different layers through holes in the insulator, commonly called vias. To reduce capacitance between conductor layers, a relatively thick insulator layer is desirable. High packing density design requires however that the via dimension be small. These circumstances mean that in multilevel metallization there is a need to fill high aspect ratio vias with high conductivity metals such as aluminum to form reliable contacts. In addition, interconnections between individual functions on the same level are often required. These interconnections may be supplied by filling elongated runs or trenches in the insulator layer with a metal such as aluminum. When conventional evaporative methods are used to fill vias and trenches, the metal vapor tends to deposit on the sidewalls of the step as well as the bottom, i.e. conformally. The metal also tends to build up at the top edge of the step to form an overhang leading to what is called the shadowing effect. This shadowing effect prevents the metal from depositing in the step corner where the vertical sidewall meets the bottom of the step. In vias and trenches which are about as deep or even deeper than they are wide (high aspect ratio), extreme shadowing effects may lead to the overhangs from each side approaching or even meeting each other, thus tending to block the trench or via from being filled from wall to wall. In any case, coverage of conventionally evaporated aluminum films in step corners and at the sidewall of vias and trenches is poor. This may lead to severe reliability problems in VLSI chips which have had interconnections formed by this method. Several techniques, such as biased sputtering, pulsed laser irradiation, selective tungsten chemical vapor deposition, and electroless plating methods have been used in efforts to overcome this problem. In addition to higher processing costs, these techniques usually yield films with poor conductivity or excessive defect density.
It is known that ion bombardment during film growth can modify the film composition, structure and other properties. Many ion-assisted deposition techniques involve foreign elements such as Ar+as the source of ions to control film properties during deposition. Recently a number of experimentalists have employed self-ions which are derived from the deposition material itself as the source of ions to control film structure and the resulting properties. There has been some success in employing self-ions for low temperature epitaxy, high efficiency dopant incorporation and control of stoichiometry of films. Ramayarananan et al. in J. Vac. Sci. Technol. B, Vol. 5, 359-362 (1987) have described the use of a nozzle jet beam or ionized cluster beam method in filling vias. This process coats the substrate non-conformally, i.e. little or no sidewall coverage occurs. Shadowing still occurs however, as shown in FIG. 1 of that reference. Vias and trenches are not filled wall-to-wall from bottom to top, as shown by the tapered shape of the aluminum plugs in FIG. 4(a) of the reference. This is borne out also by the computer simulation results shown in FIG. 6 of Ramayarananan et al.. In FIG. 5 of that publication, the effect of the simultaneous use of a combination of simple evaporation and nozzle jet beam techniques is shown to result in sidewall coverage from the evaporation process ("flags") combined with the tapered shape from the jet beam.
These techniques using self-ions have been called Partially Ionized Beam Deposition (PIBD). Unlike the ionization source for efficient dopant incorporation which is a point source which yields a high-energy beam composed of 100% ions, PIBD techniques have used small amounts of ions during deposition. The ion/atom ratio, or ionization efficiency, .alpha., of the beam is normally less than 0.2%. As shown in FIG. 2 of this application, in the conventional design the ionization unit of the PIBD system is located outside the vaporization chamber, a few cm away from the evaporation crucible. It has been determined that under typical operating conditions the ionization efficiency of this design is quite low (less than 0.2% ion/atom ratio). To enhance the ion-assisted deposition effect, a higher ionization efficiency is desirable.